;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST1.ASM
;
; Test basic incrementing and decrementing instructions and
; skipping.
;
; Output an incrementing pattern to PORTB, up to 20 and
; then start decrementing back down to zero, repeat forever.
;
count equ 14 ;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start clrf count
; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
incloop:
movf count, W ; W <= count
movwf portb ; PORTB <= W
incf count, W ; W <= count + 1
movwf count
xorlw 14h ; Compare W with 20
btfss STATUS, ZERO
goto incloop
; OK. We hit FF, Now decrement for a while
decloop:
movf count, W ; W <= count
movwf portb ; PORTB <= W
decf count ; W <= count - 1
btfss STATUS, ZERO
goto decloop
goto incloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST2.ASM
;
; Test ADD instructions
;
; Output an ever increasing series (x = x + 10) to PORTB.
; Watch the Carry bit pulse HIGH when it wraps.
;
x equ 14 ;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start clrf x
; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
addloop:
movlw D'10'
addwf x, W ; W <= W + X
movwf x ; X <= W
movwf portb ; PORTB <= W
goto addloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST3.ASM
;
; Test SUB instructions. Output to PORTB a series of numbers, x = x - 10.
; Watch the Carry/Borrow bit pulse LOW when it wraps.
;
;
x equ 14 ;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start movlw D'20'
movwf x
; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
subloop:
movlw D'10'
subwf x, W ; W <= W + X
movwf x ; X <= W
movwf portb ; PORTB <= W
goto subloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST4.ASM
;
; Test the Rotate instructions. Cause a single '1' to rotate right
; a bunch of times, then rotate left, then repeat again forever.
;
x equ 14
count equ 15
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
main:
movlw D'20'
movwf count
clrf x
bsf STATUS, CARRY
rrf x, W
movwf x
movwf portb ; PORTB <= W
bcf STATUS, CARRY
; OK. Rotate 20 times
rloop1 rrf x, W
movwf x
movwf portb ; PORTB <= W
decfsz count
goto rloop1
;*** Now go the other way
movlw D'236'
movwf count
clrf x
bsf STATUS, CARRY
rlf x, W
movwf x
movwf portb ; PORTB <= W
bcf STATUS, CARRY
; OK. Rotate 20 times
rloop2 rlf x, W
movwf x
movwf portb ; PORTB <= W
incfsz count
goto rloop2
done goto main
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST5.ASM
;
; Test various Logical operations.. Output incrementing pattern
; to PORTB through contorted logical operations.
;
x equ 14
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
main:
clrw ; W <= 00000000
movwf portb ; PORTB <= W
;*** Test the Literal Logicals
;
iorlw B'00000001' ; W <= 00000001
movwf portb
xorlw B'00000011' ; W <= 00000010
movwf portb
iorlw B'11111111' ; W <= 11111111
andlw B'00000011' ; W <= 00000011
movwf portb
;*** Test the File Register Logicals
;
; Output 4 (00000100)
movlw B'10101010' ; W <= 10101010
movwf x ; X <= W
movlw B'10101110'
xorwf x ; X <= 00000100
movf x, W ; Output..
movwf portb
; Output 5 (00000101)
movlw B'10101010' ; W <= 10101010
movwf x ; X <= W
movlw B'00000101'
iorwf x ; X <= 10101111
movlw B'01010101'
andwf x ; X <= 00000101
movf x, W ; Output..
movwf portb
; Output 6 (00000110)
movlw B'11111001'
movwf x ; X <= 11111001
comf x ; X <= 00000110
movf x, W ; Output..
movwf portb
done goto done
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST6.ASM
;
; Test I/O Ports.
;
; Echo anything read on PORTA to PORTB and echo complement to PORTC.
;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
mainloop:
movf porta, W ; W <= PortA
movwf portb ; PORTB <= W
xorlw H'FF' ; Complement W
movwf portc ; PORTB <= W
goto mainloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C56 is the target processor
; PIC Core Verification Program
;
; TEST7.ASM
;
; Test Register File Banks and address mapping, and Indirect Addressing.
;
; Location count is located in lower half of banks and should be
; accessable regardless of the bank. Increment
; this counter after switching to each bank. Write this count
; to locations in upper part of each bank. Then go back, read
; each value and echo out portb. Should see incrementing pattern
; on PORTB.
;
INDF equ 0
FSR EQU 4
count equ 9 ; This location should be common to all Banks
x0 equ 01eh ; This is in upper part of Bank0
x1 equ 03eh ; This is in upper part of Bank1
x2 equ 05eh ; This is in upper part of Bank2
x3 equ 07eh ; This is in upper part of Bank3
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start clrw
tris portb
movwf count
incf count
; Point to a location in upper part of Bank #0
movlw x0 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; Point to a location in upper part of Bank #1
movlw x1 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; Point to a location in upper part of Bank #2
movlw x2 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; Point to a location in upper part of Bank #3
movlw x3 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; OK. Go back and read each count and output to PORTB
movlw x0 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
movlw x1 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
movlw x2 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
movlw x3 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
done goto done
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C56 is the target processor
; PIC Core Verification Program
;
; TEST8.ASM
;
; Test CALL and RET instructions..
;
; The 16C57 only has 2 stack levels!
count equ 14
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
main:
clrf count
call func1
movwf portc
call func1
movwf portc
call func2
movwf portc
call func2
movwf portc
call func3
movwf portc
done goto done
func1 incf count
movf count, W
movwf portb
retlw h'88'
func2 decf count
movf count, W
movwf portb
retlw h'77'
func3 call func1
movwf portc
retlw h'66'
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
; PIC Core Verification Program
;
; TEST9.ASM
;
; Test the TIMER0 free-running timer
;
; Let's just read timer0 as fast as we can, and output it to PORTB.
; Every 20 times through the loop, increment (mod 8) the prescaler.
; Echo the prescaler out PORTC. So, we should we that PORTB changes
; less frequently as the prescaler increases. Eventually, the prescaler
; wraps back to zero, and this repeats infinitely.
;
; Verilog-XL note: A great way to see this is to display the signals:
; tmr0, portb and portc. If you do this, you can see the affect
; pretty clearly.
;
count equ 08
scale equ 09
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
timer0 equ 01 ; Timer0
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
clrf scale
loop1:
movlw d'20'
movwf count
movf scale, W ; Get prescaler
option ; Program it
movwf portc ; Write current prescaler to PORTC
loop2 movf timer0, W ; Read Timer0
movwf portb ; Echo it out PORTB
decfsz count ; Do this some number of times
goto loop2
incf scale ; Increment our prescaler, but..
movlw B'00000111' ; keep it to 3 bits.
andwf scale
goto loop1
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST1.ASM
;
; Test basic incrementing and decrementing instructions and
; skipping.
;
; Output an incrementing pattern to PORTB, up to 20 and
; then start decrementing back down to zero, repeat forever.
;
count equ 14 ;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start clrf count
; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
incloop:
movf count, W ; W <= count
movwf portb ; PORTB <= W
incf count, W ; W <= count + 1
movwf count
xorlw 14h ; Compare W with 20
btfss STATUS, ZERO
goto incloop
; OK. We hit FF, Now decrement for a while
decloop:
movf count, W ; W <= count
movwf portb ; PORTB <= W
decf count ; W <= count - 1
btfss STATUS, ZERO
goto decloop
goto incloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST2.ASM
;
; Test ADD instructions
;
; Output an ever increasing series (x = x + 10) to PORTB.
; Watch the Carry bit pulse HIGH when it wraps.
;
x equ 14 ;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start clrf x
; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
addloop:
movlw D'10'
addwf x, W ; W <= W + X
movwf x ; X <= W
movwf portb ; PORTB <= W
goto addloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST3.ASM
;
; Test SUB instructions. Output to PORTB a series of numbers, x = x - 10.
; Watch the Carry/Borrow bit pulse LOW when it wraps.
;
;
x equ 14 ;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start movlw D'20'
movwf x
; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
subloop:
movlw D'10'
subwf x, W ; W <= W + X
movwf x ; X <= W
movwf portb ; PORTB <= W
goto subloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST4.ASM
;
; Test the Rotate instructions. Cause a single '1' to rotate right
; a bunch of times, then rotate left, then repeat again forever.
;
x equ 14
count equ 15
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
main:
movlw D'20'
movwf count
clrf x
bsf STATUS, CARRY
rrf x, W
movwf x
movwf portb ; PORTB <= W
bcf STATUS, CARRY
; OK. Rotate 20 times
rloop1 rrf x, W
movwf x
movwf portb ; PORTB <= W
decfsz count
goto rloop1
;*** Now go the other way
movlw D'236'
movwf count
clrf x
bsf STATUS, CARRY
rlf x, W
movwf x
movwf portb ; PORTB <= W
bcf STATUS, CARRY
; OK. Rotate 20 times
rloop2 rlf x, W
movwf x
movwf portb ; PORTB <= W
incfsz count
goto rloop2
done goto main
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST5.ASM
;
; Test various Logical operations.. Output incrementing pattern
; to PORTB through contorted logical operations.
;
x equ 14
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
main:
clrw ; W <= 00000000
movwf portb ; PORTB <= W
;*** Test the Literal Logicals
;
iorlw B'00000001' ; W <= 00000001
movwf portb
xorlw B'00000011' ; W <= 00000010
movwf portb
iorlw B'11111111' ; W <= 11111111
andlw B'00000011' ; W <= 00000011
movwf portb
;*** Test the File Register Logicals
;
; Output 4 (00000100)
movlw B'10101010' ; W <= 10101010
movwf x ; X <= W
movlw B'10101110'
xorwf x ; X <= 00000100
movf x, W ; Output..
movwf portb
; Output 5 (00000101)
movlw B'10101010' ; W <= 10101010
movwf x ; X <= W
movlw B'00000101'
iorwf x ; X <= 10101111
movlw B'01010101'
andwf x ; X <= 00000101
movf x, W ; Output..
movwf portb
; Output 6 (00000110)
movlw B'11111001'
movwf x ; X <= 11111001
comf x ; X <= 00000110
movf x, W ; Output..
movwf portb
done goto done
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
;
; PIC Core Verification Program
;
; TEST6.ASM
;
; Test I/O Ports.
;
; Echo anything read on PORTA to PORTB and echo complement to PORTC.
;
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
mainloop:
movf porta, W ; W <= PortA
movwf portb ; PORTB <= W
xorlw H'FF' ; Complement W
movwf portc ; PORTB <= W
goto mainloop
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C56 is the target processor
; PIC Core Verification Program
;
; TEST7.ASM
;
; Test Register File Banks and address mapping, and Indirect Addressing.
;
; Location count is located in lower half of banks and should be
; accessable regardless of the bank. Increment
; this counter after switching to each bank. Write this count
; to locations in upper part of each bank. Then go back, read
; each value and echo out portb. Should see incrementing pattern
; on PORTB.
;
INDF equ 0
FSR EQU 4
count equ 9 ; This location should be common to all Banks
x0 equ 01eh ; This is in upper part of Bank0
x1 equ 03eh ; This is in upper part of Bank1
x2 equ 05eh ; This is in upper part of Bank2
x3 equ 07eh ; This is in upper part of Bank3
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start clrw
tris portb
movwf count
incf count
; Point to a location in upper part of Bank #0
movlw x0 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; Point to a location in upper part of Bank #1
movlw x1 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; Point to a location in upper part of Bank #2
movlw x2 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; Point to a location in upper part of Bank #3
movlw x3 ; Get Address
movwf FSR ; Set index register
movf count,W ; Get the count value
movwf INDF ; Write using index
incf count ; Increment the counter
; OK. Go back and read each count and output to PORTB
movlw x0 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
movlw x1 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
movlw x2 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
movlw x3 ; Get Address
movwf FSR ; Set index register
movf INDF,W ; Retrieve the count value to W
movwf portb ; Write to PORTB
done goto done
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C56 is the target processor
; PIC Core Verification Program
;
; TEST8.ASM
;
; Test CALL and RET instructions..
;
; The 16C57 only has 2 stack levels!
count equ 14
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
main:
clrf count
call func1
movwf portc
call func1
movwf portc
call func2
movwf portc
call func2
movwf portc
call func3
movwf portc
done goto done
func1 incf count
movf count, W
movwf portb
retlw h'88'
func2 decf count
movf count, W
movwf portb
retlw h'77'
func3 call func1
movwf portc
retlw h'66'
;
org 01FFh
goto start
;
END
;
LIST p=16C57 ; PIC16C57 is the target processor
; PIC Core Verification Program
;
; TEST9.ASM
;
; Test the TIMER0 free-running timer
;
; Let's just read timer0 as fast as we can, and output it to PORTB.
; Every 20 times through the loop, increment (mod 8) the prescaler.
; Echo the prescaler out PORTC. So, we should we that PORTB changes
; less frequently as the prescaler increases. Eventually, the prescaler
; wraps back to zero, and this repeats infinitely.
;
; Verilog-XL note: A great way to see this is to display the signals:
; tmr0, portb and portc. If you do this, you can see the affect
; pretty clearly.
;
count equ 08
scale equ 09
porta equ 05 ; I/O register F5
portb equ 06 ; I/O register F6
portc equ 07 ; I/O register F7
timer0 equ 01 ; Timer0
STATUS equ 03 ; STATUS register F3
CARRY equ 0 ; Carry bit in status register
ZERO equ 2 ;
W equ 0
;
;
start ; Set up TRIS registers
movlw 0ffh
tris porta ; PORTA is Input
clrw
tris portb ; PORTB is Output
tris portc ; PORTC is Output
clrf scale
loop1:
movlw d'20'
movwf count
movf scale, W ; Get prescaler
option ; Program it
movwf portc ; Write current prescaler to PORTC
loop2 movf timer0, W ; Read Timer0
movwf portb ; Echo it out PORTB
decfsz count ; Do this some number of times
goto loop2
incf scale ; Increment our prescaler, but..
movlw B'00000111' ; keep it to 3 bits.
andwf scale
goto loop1
;
org 01FFh
goto start
;
END
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