Copyright (C) 1988 Intermetrics, Inc. All rights reserved. Standard VHDL 1076 Support Environment Version 2.0 - 1 September 1989 %VHDSIM-N-SIGTRAN Signal Tracing turned on NICKEL =0 DIME = X Sel = X Ret = X enable = X change = 0 NICKEL =0 DIME = 0 Sel = X Ret = X enable = X change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = X enable = X change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = 1 enable = X change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =1 DIME = 0 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =0 DIME = 1 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = 0 enable = 1 change = 0 NICKEL =0 DIME = 0 Sel = 1 Ret = 0 enable = 1 change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =0 DIME = 1 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =0 DIME = 1 Sel = 0 Ret = 0 enable = 0 change = 0 NICKEL =0 DIME = 0 Sel = 0 Ret = 0 enable = 1 change = 1 NICKEL =0 DIME = 0 Sel = 1 Ret = 0 enable = 1 change = 1 NICKEL =0 DIME = 0 Sel = 0 Ret = 0 enable = 0 change = 0 %VHDSIM-F-ASSERTV Assertion Violation after 150 ns at line 8126 in procedure SYS_FINISH at line 8122 in package body <<VERILOG_II>>VERILOG_STD Simulation Terminated By $FINISH. <div align="center"><br /><script type="text/javascript"><!-- google_ad_client = "pub-7293844627074885"; //468x60, Created at 07. 11. 25 google_ad_slot = "8619794253"; google_ad_width = 468; google_ad_height = 60; //--></script> <script type="text/javascript" src="http://pagead2.googlesyndication.com/pagead/show_ads.js"> </script><br /> </div>