use work.watch_types.all; architecture testbench_behav of testbench is component stopwatch is port ( sr_pressed : in bit; ss_pressed : in bit; sys_clk : in bit; sys_rst : in bit; display_drv : out time_disp; indicators_on : out bit ); end component stopwatch; FOR ALL : stopwatch USE ENTITY work.stopwatch; signal clock : bit := '1'; signal ss_switch, lr_switch : bit := '1'; signal lcd_output : time_disp; signal indicators : bit; begin device_to_test : component stopwatch port map (sys_rst => '1', sys_clk => clock, ss_pressed => ss_switch, sr_pressed => lr_switch, display_drv => lcd_output, indicators_on => indicators ); ticktock : process is -- 100 kHz clock begin clock <= '0', '1' after 5 us; wait for 10 us; end process ticktock; stimulus : process is begin ss_switch <= '0'; lr_switch <= '0'; wait for 100 ms; ss_switch <= '1', '0' after 1 ms; wait for 100 ms; lr_switch <= '1', '0' after 1 ms; wait for 100 ms; lr_switch <= '1', '0' after 1 ms; wait for 100 ms; ss_switch <= '1', '0' after 1 ms; wait for 100 ms; lr_switch <= '1', '0' after 1 ms; wait; end process stimulus; end architecture testbench_behav;