Once a module has been designed it can be tested by applying
test inputs.
This is idea of the
stimulus
module. It calls the design module and uses its functionality, then
results can be monitored to verify its design. A well written stimulus
will be able to put the whole design through its paces.
Below is the stimulus for the multiplexor examples given in the
previous sections, the same stimulus can be applied to each of the
designs above since they look the same externally and are performing
the same function, only in different ways.
module muxstimulus;
reg IN1, IN2, IN3, IN4, CNTRL1, CNTRL2;
wire OUT;
multiplexor4_1 mux1_4(OUT, IN1, IN2, IN3, IN4, CNTRL1, CNTRL2);
initial begin
IN1 = 1; IN2 = 0; IN3 = 1; IN4 = 0;
$display("Initial arbitrary values");
#0 $display("input1 = %b, input2 = %b, input3 = %b, input4 = %b\n",
IN1, IN2, IN3, IN4);
{CNTRL1, CNTRL2} = 2'b00;
#1 $display("cntrl1=%b, cntrl2=%b, output is %b", CNTRL1, CNTRL2, OUT);
{CNTRL1, CNTRL2} = 2'b01;
#1 $display("cntrl1=%b, cntrl2=%b output is %b", CNTRL1, CNTRL2, OUT);
{CNTRL1, CNTRL2} = 2'b10;
#1 $display("cntrl1=%b, cntrl2=%b output is %b", CNTRL1, CNTRL2, OUT);
{CNTRL1, CNTRL2} = 2'b11;
#1 $display("cntrl1=%b, cntrl2=%b output is %b", CNTRL1, CNTRL2, OUT);
end
endmodule
module muxstimulus;
reg IN1, IN2, IN3, IN4, CNTRL1, CNTRL2;
wire OUT;
multiplexor4_1 mux1_4(OUT, IN1, IN2, IN3, IN4, CNTRL1, CNTRL2);
Now multiplexor4_1 is active, if the inputs change, ie. are assigned test values, it will compute a value for the output and drive it into out.
initial begin
IN1 = 1; IN2 = 0; IN3 = 1; IN4 = 0;
$display("Initial arbitrary values");
#0 $display("input1 = %b, input2 = %b, input3 = %b, input4 = %b\n",
IN1, IN2, IN3, IN4);
{CNTRL1, CNTRL2} = 2'b00;
#1 $display("cntrl1=%b, cntrl2=%b, output is %b", CNTRL1, CNTRL2, OUT);
{CNTRL1, CNTRL2} = 2'b01;
#1 $display("cntrl1=%b, cntrl2=%b output is %b", CNTRL1, CNTRL2, OUT);
{CNTRL1, CNTRL2} = 2'b10;
#1 $display("cntrl1=%b, cntrl2=%b output is %b", CNTRL1, CNTRL2, OUT);
{CNTRL1, CNTRL2} = 2'b11;
#1 $display("cntrl1=%b, cntrl2=%b output is %b", CNTRL1, CNTRL2, OUT);
end
endmodule
This test file does not fully exercise the multiplexor, but it is a good initial check.